Demonstration of Co-Packaged Optics Assembly for Fiber-Based Optical Interconnect

Modern computing techniques have enabled new applications like AI, machine learning, self-driving cars etc. Transistor scaling alone is not enough to satisfy the highperformance needs for these advanced applications. Co-packaged optics emerged as the future of heterogeneous integration architectures to meet the computing and communication demands for high bandwidth at low power. DARPA awarded Intel Federal LLC the Photonics in the Package for Extreme Scalability (PIPES) and Common Heterogeneous Integration and IP Reuse Strategies (CHIPS) Program. The prototype for this program was a multi-chip package (MCP) with novel open cavity bridge substrate consisting of a compute tile connected through Intel's Embedded Silicon Bridge (EMIB) technology to two data converter dies on one side and three EIC-PIC stacks on the other side with corresponding 3 FAUs (56 couplers, 127 um pitch) via fiber-based butt-coupling technology. In collaboration with Cornell University for EIC design, Columbia and AIM photonics for PIC design, State University of New York for PIC manufacturing and Tyndall for fiber attach, Intel has successfully demonstrated the proof-ofconcept assembly for a novel co-packaged optical package with an open cavity bridge architecture for fiber-based butt-coupling optical interconnection.