Implementation of FPGA-based Neural Network Controller for Reducing Speed Ripple for a PMSM-driven EV using MRAS Speed Estimator

The conventional model reference adaptive system (MRAS) employs a proportional-integral (PI) controller with a low-pass filter (LPF). However, the LPF and integrator add phase delay and DC drift, leading to inaccurate speed estimation. Furthermore, conventional MRAS suffers from poor speed estimation owing to the initial value of the integrator and the DC drift problem. In the proposed stator-current MRAS, the measured current from the reference model and the estimated current from the adaptive model were compared. A modified integrator (MI) was proposed that eliminates the initial value and reduces the DC drift problem during the practical implementation of an integrator. For accurate speed estimation and LPF elimination, this study proposes an artificial neural network (NN) controller as an adaptive mechanism of the MRAS (NNMRAS) speed estimator for the closed-loop control of permanent magnet synchronous motors (PMSMs) in electric vehicles (EVs) during the limp-home mode. For validation, the conventional MRAS (CMRAS), modified integrator-based MRAS (MIMRAS), and NNMRAS speed estimators for direct torque and flux control (DTFC) and space vector modulation-DTFC (SVM-DTFC) were used with standard parameters, such as standard deviation (SD), overshoot, and undershoot, at different reference speeds. A laboratory test setup using a 2.2 kW PMSM and the field-programmable gate array (FPGA)-based WAVECT WCU 300 controller was used to validate the effectiveness of the limp-home mode control.