3D TCAD Simulation Analysis of Single-Event Transients on LDD ringFETs and LDD ringFET-based Inverter Circuits

Numerical device simulations were employed to evaluate the lightly doped drain (LDD) ringFET’s performance under heavy ion radiation. By adding lightly doped regions on both the source and drain sides of the conventional ringFET design, the LDD ringFET structures were developed. The response of LDD ringFETs under heavy ion irradiation employing both outer and inner drain arrangements is investigated, and susceptible locations are discovered using Single Event Transient (SET) analysis. In an LDD ringFET with an outer drain arrangement, the LDD near the drain is the most susceptible and for an LDD ringFET with an inner drain arrangement, the most susceptible area is the centre of the drain. The centre of the source is the least susceptible area for the LDD ringFET using both inner and outer drain arrangements. The study also found that LDD ringFETs with an inner drain arrangement exhibit lower collected charge compared to those with an outer drain arrangement, making them more suitable for use in radiation-prone environments. Furthermore, single-event transient analysis was performed on an LDD ringFET-based inverter employing both outer and inner drain arrangements. The results showed that LDD ringFET-designed circuits with an inner drain arrangement are more radiation-resistant than those with an outer drain arrangement.