Design and Verification of APB Protocol

The AMBA protocol comprises the Advanced Peripheral Bus (APB) component, designed for low-power, efficient communication between microprocessors and peripherals in mainstream System-on-Chip (SoC) designs. Its strength lies in simplicity, integration convenience, and low-latency communication making it the right choice for energy-sensitive applications. Therefore, in this paper, the design and verification of the APB protocol have been discussed based on a Finite State Machine (FSM) model to give a broad overview of the various phases of operation of the standard and a structured implementation. Verification is completed using System Verilog to thoroughly check the functional and timing aspects of APB-based verification. Abstract state checks and coverage analyses confirm compliance with the protocol specification and ensure dependable performance. Constrained random testing, assertion-based verification, and thorough coverage analysis are practiced on the designed model. Simulations showed that the protocol exhibits the typical low-power communication behaviour fitting into modern SoC architectures and applications like IoT devices or embedded systems.