An On-Chip Reconfigurable Front-end for Ultra-Low-Power RF Energy Harvesting

This brief presents a reconfigurable dual-output front-end for ultra-low-power (ULP) RF energy harvesting applications, demonstrating a stable output voltage ranging from 1.3 V to 1.8 V over a wide input power range of -22.5 dBm to -3 dBm. The proposed design incorporates a novel knockout-based reconfigurable architecture with dual outputs and a self-compensation dual-stage cross-coupled differential-drive (CCDD) rectifier topology, enabling efficient output control for ultra-low-power systems while maintaining high efficiency and sensitivity. Implemented in 40 nm CMOS technology, the 4-stage 900 MHz rectifier achieves a peak power conversion efficiency (PCE) of 42.8% at -20 dBm input with 0.5 MΩ load, along with an measured -23.6 dBm sensitivity at 1 V output voltage under 1 MΩ load.