Analysis of the Magnetic Fields Only Currents (MFCO) COMSOL Interface for the Simulation of Parasitic Inductances in Chip Embedding Power Boards

Chip embedding power modules are a promising solution for multilevel converter implementation due to their high level of integration, thermal performance, and low parasitic inductance compared with standard power modules. This study employs COMSOL's Magnetic Fields Only Currents (MFCO) interface to evaluate partial inductance in power chip embedding boards, focusing on 3D modelling of a complex geometry, mesh refinement, and some issues arising from the definition of boundary conditions. A practical case is presented to illustrate these phenomena. Finally, an experimental measurement is also shown to validate the simulation results.