Tutorial: Digital Fractional-N Phase-Locked-Loop Design

The tutorial overviews the basics of digital fractional-N phase-locked-loop architectures and their design principles from the signal-processing level down to circuit design. We will examine various design constraints and implementation overhead of such architectures due to the inherent digital architecture as well as circuit non-idealities. We will discuss circuit design and calibration techniques. Lastly, some real design examples in silicon with measurement data will be provided.