Digital Self-Interference Cancellation in Wideband Star Radio Using an Auxiliary Receiver

This paper presents a novel digital self-interference cancellation (DSIC) technique in full-duplex radios supporting simultaneous transmission and reception (STAR). Key to the design approach is the development of a behavioral model of the full-duplex radio front-end at the digital baseband. An auxiliary receiver (RX) chain is deployed to capture the transmitter (TX) chain and the leakage channel response. The leaked signal is digitally reconstructed and analog cancellation is performed at the low-noise amplifier (LNA) input to prevent desensitization. The cancellation algorithm is developed on a $16-\text{nm}$ AMDXilinx radio frequency system-on-chip (RFSoC) incorporating gigasample speed data converters and field programmable gate array (FPGA) on the same chip. The architecture is directly implemented on the programmable logic (PL) and the model coefficients are calculated offline in the ARM processor of the SoC. The hardware demonstration employs a reduced number of off-the-shelf analog components that provide an impressive digital cancellation of 20 dB for a maximum modulation bandwidth of 400 MHz.