Efficient FPGA Implementation of Multiplication Operations in Artificial Neural Networks for Human Activity Recognition

Human activity recognition (HAR) systems implemented on field-programmable gate array (FPGA) are evaluated as highly suitable for everyday use by individuals and older people due to their high accuracy and real-time capabilities. Wearable sensors are employed in this study to detect the body movements of individuals, and the UCI public database is utilized for system evaluation. The proposed system takes 19 features as input and classifies individuals’ activities into five categories: walking, sitting, standing, laying, and activity transition. Two models, multilayer perceptron (MLP) and 1-D convolutional neural network (CNN), are presented for this system, which, due to their appropriate structure, achieve a low number of parameters and satisfactory accuracy. The acquired accuracy is 97.03% for the MLP model and 97.74% for the 1-D CNN model. For FPGA implementation, a frequency of 100 MHz and 16-bit fixed-point numbers are used. Additionally, two methods, DSP and CMult, are used as multipliers in the implementation of neural networks. This article presents a novel method to use CMult as a neural network multiplier. Finally, the best-presented model is the 1-D CNN architecture based on CMult, which achieves a power consumption of 372 mW and a latency of 170ns, yielding better outcomes than similar works.