Suppressed Negative DIBL of Ferroelectric HEMT With Gate-Align Patterned AlScN Stack

In this letter, we present a ferroelectric GaN HEMT with gate-align patterned AlScN stack, suppressing negative drain-induced barrier lowering effect. The FeHEMTs exhibited apparent counterclockwise hysteresis with a steep SS even at high drain voltage by preventing unintended poling of ferroelectric polarizations induced by high negative gate-drain bias. Furthermore, the structure provides enhanced gate controllability with a steep subthreshold swing (SS) of 13 mV/dec and an increasing memory window depending on gate voltage sweep ranges. The results highlight the potential of employing the proposed FeHEMT for GaN-based logic circuits and energy efficient devices.