Area and Power Modeling of FPGA Based Binary-to-Gray Code Converter Circuit for Rotary Encoder

The rotary encoders are crucial components of many precision control systems and using gray codes in such systems helps ensure accurate positional data. Hence, it is imperative to efficiently convert binary data to gray code in order to reduce tracking errors. Area and power being two main design constraints for digital circuits need to be estimated. Even though the current commercial tools can be used to make these estimates, doing so takes more time because complete design cycles need to be followed. Accurately estimating resource usage and power dissipation early in the design process while working under tight deadline is therefore one of the biggest challenges for designers. None of the existing literature address the modeling of area and power for binary-to-gray converter circuits. This paper proposes area and power estimation models of Field Programmable Gate Arrays (FPGA) based binary-to- gray code converter circuits. The converter circuits are described using very high-speed integrated circuit hardware description language (VHDL), and synthesized using Vivado 2014.2 tool targeted to Zynq family FPGAs device (xc7z020clg484-1). The proposed models are developed in MATLAB Curve Fit tool using regression approach of machine learning. Using the proposed models, the FPGA resource utilization and power dissipation of binary-to-gray code converter circuits are predicted and compared with the reports obtained using Vivado tool. The low values of estimation error obtained in all cases demonstrate the high accuracy of proposed area and power models.