The Electrothermal Characteristics Under Short-Circuit Stress in Planar Gate SiC MOSFETs

The third-generation wide-bandgap semiconductor, silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET), has emerged as a focal point in the industry, particularly concerning its robustness under short-circuit conditions. This study presents experimental validations and simulation analyses of the short-circuit failure mechanism, along with the behavior of silicon carbide planar gate power MOSFETs under short-circuit stress. A prevalent phenomenon observed in the short-circuit failures of numerous SiC power devices is the positive feedback of current due to thermal runaway, which typically manifests as an inability to effectively suppress the drain current of the SiC MOSFET after the gate voltage is turned off. In planar gate structures, this phenomenon represents the principal cause of short-circuit failure. Moreover, the degradation of the gate oxide subjected to short-circuit stress can also lead to short-circuit failure of the gate-source, constituting an additional factor. Building upon this foundation, practical tests were conducted on the VDMOS devices to validate the results of the simulation analysis, and a theoretical examination was performed to elucidate the actual failure mechanisms involved. Investigating the short-circuit stability of these devices yields critical insights for the application of power components.