HERO: A High-Efficient RISC-V Exploration and Optimization Framework

RISC-V is a reduced instruction set architecture (ISA) known for its modular design, simplicity, and portability, making it suitable for a wide range of applications, from small embedded systems to large-scale computers. BOOM[7] is a microprocessor based on the RISC- V architecture, featuring numerous adjustable parameters, which complicates manual tuning. Efficient and accurate optimization of its parameter space has posed a significant challenge for designers. This study introduces HERO: A High-Efficient RISC-V Exploration and Optimization Framework, an automated design space exploration framework that addresses the parameter optimization issues encountered with processors like BOOM. Experimental results indicate that the TPE algorithm utilized in the HERO framework enhances tuning outcomes for the target value (the product of processor performance metrics, specifically cycles and power consumption) by 1.4% compared to Randomized Algorithm[IS], by 3.3% compared to Quasi-Monte Carlo (QMC) [16]and Genetic Algorithms (GA)[17], and by 20.8% compared to Human Effort[18], thereby achieving efficient and high-performance automated tuning.