Design and Analysis of Second Generation Voltage Conveyor using FVF and Resistive Compensation Technique

This paper presents a Class-AB second-generation voltage conveyor circuit designed specifically for low voltage and low power applications. The proposed architecture comprises a resistively compensated current buffer input stage and voltage buffer output stage. This configuration achieves a wide dynamic range, high bandwidth, and low power consumption. The circuit's performance has been validated through simulations using a standard 0.18μm TSMC CMOS technology at ±0.5V supply voltage. The performance enhancements offered by the proposed circuit are demonstrated and rigorously evaluated through their application in Transimpedance Amplifier design (TIA).