Automatic Waveguide Routing With Optimized Loss for Silicon Photonics Interconnect

With the rapid advancement of photonic integrated circuits (PIC), achieving efficient automatic routing while optimizing loss has emerged as one of the major challenges in photonic design automation. This paper addresses the problem of automatic waveguide routing in silicon photonics interconnect, implementing micrometer-scale meshing of the routing space and parameterizing of obstacles. We propose an improved A* algorithm based on a multi-loss factor evaluation function, incorporating a bending-forward strategy and terminal region planning. Through the routing experiments on complex silicon photonic integrated circuits (SPIC) of size 1000 μm × 1000 μm, the effectiveness of our algorithm has been validated. The improved A* algorithm achieves rapid generation of waveguide routing with optimized loss, balancing bends and crossings effectively, and achieving a loss as low as 3.72 dB within 44.17 seconds for a single routing execution. This research findings provide a feasible solution for automatic waveguide routing in silicon photonics interconnect, and offer potential value for the advancement of large-scale PIC.