High-Storage, Low-Variability, and Low-Power Read-After-Write Superlattice HfO2/ZrO2 FeFET Memory Device by Using a Multifunctional MoOx/TiON Layer

In this study, we present a multifunctional gate oxide ferroelectric transistor technology fully compatible with existing commercial semiconductor devices. In contrast to single electrodes, this electrode employs a TiN/Mo (30 nm)/barrier layer of TiN (BL-TiN) (2.5 nm), with an insulator composed of an angstrom-laminated HfO2/ZrO2 structure, featuring each layer of 6.5Å thickness. Based on ${D}_{\text {it}}$ and x-ray photoelectron (XPS) results, the inclusion of MoOx/TiOxNy layer highly suppresses trapping charges and leakage current of metal-ferroelectric-insulator-semiconductor (MFIS)-ferroelectric field-effect transistor (FeFET). The substantial defect reduction enables low-voltage immediate read-after-write and significantly enhances erase (ER) and program (PG) speeds by 61% and 43%, respectively. Furthermore, SEM and grazing incidence X-ray diffraction (GIXRD) analyses confirm the formation of smaller HZO grains on this layer, which enhances polarization switching uniformity, enables high storage density with 3 bits/cell [triple-level cell (TLC)] operation, minimizes device-to-device (DtD) variability, and achieves exceptional endurance exceeding $10^{{9}}$ cycles. Notably, the low-interface-defect and mass-ordered HfO2/ZrO2 structure has been demonstrated to effectively enhance thermal stability, and achieved a ten-year retention at $108.9~^{\circ }$ C, exceeding the current industrial dynamic random access memory (DRAM) standard of $95~^{\circ }$ C. This technology establishes a foundation for the application in future neuromorphic network designs.