Post-Irradiation Fault Injection for Complex FPGA Designs

Fault injection is a widely used method of assessing the reliability of field-programmable gate array (FPGA) designs operating in harsh radiation environments. While typically conducted before radiation testing, fault injection can also be performed after radiation testing to gain additional insights into an FPGA design’s behavior during a radiation test. In this work, fault injection was performed on a fault-mitigated FPGA soft processor design based on configuration memory (CRAM) upsets observed during a neutron radiation test. During the neutron radiation test, the locations and timestamps of CRAM upsets were logged along with the timestamps of design failures. A variety of statistical post-irradiation fault injection experiments “replayed” these recorded CRAM upsets to reproduce the design’s behavior in the beam and better understand vulnerabilities in the mitigated design. Using this approach, the majority of the failures seen in the radiation beam (92%) were successfully replicated through fault injection. This method identified the specific CRAM upsets responsible for design failures, estimated the probability that such CRAM upsets cause design failures, and uncovered failures caused by the latent effects of previously scrubbed CRAM upsets. Additionally, this approach identified differences in design failure when the same CRAM upset playback is applied to different FPGA devices and boards. These findings demonstrate that post-irradiation fault injection can provide new insights into the failure mechanisms of complex FPGA designs beyond what is possible with radiation testing alone.