A RISC-V Extended Infrastructure for CNNs Through Pipelined Computing and Data Dependence Optimization

With the rapid development of Artificial Intelligence (AI), convolutional neural networks (CNNs) have been widely applied in fields like computer vision and recommendation systems. This growth has intensified the demand for hardware acceleration of CNNs. Existing accelerators are either designed as co-processors or improve performance through extended instructions. While these methods can significantly improve performance, they often result in limited programming and execution flexibility. In this article, we design custom RISC-V instructions specifically for CNNs to maximize data reuse and exploit parallelism. Then, to efficiently execute CNNs instructions, we extend a pipelined vector computing unit (PPVCU). Finally, we incorporate pattern detection logic (PDL) to identify common data dependence patterns in CNNs, enabling the data dependence computing unit (DDCU) to process instructions within each pattern in parallel. Experimental results show that our approach achieves, on average, $9.54\times $ performance improvement and $6.7\times $ energy efficiency improvement compared to our baseline, $8.34\times $ performance improvement, and $3.1\times $ energy efficiency improvement compared to state-of-the-art designs.