Lightweight 6-bit S-Boxes With DPA Resistance

Lightweight S-boxes have a significant impact on cryptographic algorithms for resource-constrained devices in the Internet of Things (IoT). Previous research on such S-oxes has focused on low area and good cryptographic properties, which neglects the resistance to side-channel analysis, especially differential power analysis (DPA). The reVisited transparency order (VTO) is one of the best indicators for evaluating S-boxes against DPA attacks so far. Therefore, this paper presents a scheme for designing 6-bit S-boxes. The designed S-boxes are suitable for lightweight block ciphers and have a certain ability to resist DPA attacks. Specifically, we first identify 23 3-bit S-boxes with the optimal cryptographic properties and the smallest hardware area through systematic screening. Then, the paper investigates the constructions of lightweight 6-bit S-boxes based on traditional algorithm structures. Finally, a novel structure named F-LM-F is proposed for designing lightweight 6-bit S-boxes by combining Feistel structure and Lai-Massey structure. It has been proven through comparison that the S-boxes under F-LM-F structure achieve fewer fixed points and lower VTO than the 6-bit S-box of BipBip cipher, with a 17.61$\%$ reduction in hardware area and a 13.58$\%$ decrease in CPU cycles.