Novel Dual Output LDO Architecture in 650-V GaN Technology for Power ICs

This paper presents a novel topology for a dual output linear regulator (LDO) for integrated functions in GaN technology. The proposed topology uses an alternative topology compared to the existing designs in literature and can generate a 6 V and 12 V regulated output voltage for monolithic gate drivers in 650-V normally-off GaN power transistors. This work presents the design of the circuit, the measurements and a comparison with existing solutions presented in other published papers.