A Series-Parallel-Resonance Oscillator With a 191.5 dBc/Hz FoM

To achieve robust ultra-low phase noise (PN) and a high figure of merit (FoM), this letter proposes a series-parallel-resonance oscillator topology based on the following ideas: 1) a low-impedance resonator that supports high power consumption and effective PN suppression within a compact layout and 2) impedance and gain boosting for PN-power tradeoff, sharper transition, and active noise reduction. Prototyped in 65-nm CMOS technology, the proposed X-band oscillator demonstrates a PN of −131.4 dBc/Hz at 1-MHz offset, a FoM of 191.5 dBc/Hz, and a FoMA (i.e., FoM with area) of 198.5 dBc/Hz at 10 GHz with quadrature output.