Finite Element Model in LTspice of a Distributed RC-Structure Fractional-Order Capacitor Device

Fractional-order capacitors can potentially be fabricated using MOS technologies taking advantage of their distributed resistive-capacitive structure. However, there are limited models to simulate the characteristics of these designs. In this work, an equivalent circuit model to represent a finite-element of a MOS structure is used to assemble a hierarchical model of a complete design in LTspice. This equivalent circuit model is validated (for designs with phases of -77°, -74°, -58°, and -53° with a maximum of ±2° tolerance) against previously established matrix model representations. Using this validated model varying gate length connections (from 100% to 6.25%) caused deviations less than 0.25° supporting that this characteristic of MOS technologies is not likely to have a significant effect on fabricated designs.