USCIM: Computing-in-Memory With Unipolar Switching SOT-MRAM

This brief presents an arithmetic paradigm for computing-in-memory (CIM) using unipolar switching spin-orbit-torque magnetic random access memory (SOT-MRAM) devices. The proposed MRAM array comprised two transistors and one SOT magnetic tunnel junction (MTJ) cell and achieves basic Boolean logic operations [and, xor, or, majority (MAJ)] and full-adder (FA) operations. The hybrid spintronics/CMOS simulation results show that the proposed designs improve latency and energy consumption by about 34%–132% and 212%–489% compared with the existing design, respectively. Monte Carlo simulations further prove the robustness of our design for the effectiveness of write/read operations.