A Double Approximate Neural Hardware Accelerator

Emerging as a prominent approach, approximate computing has found widespread application in diverse fields such as data mining and image processing, effectively curbing area and power consumption in processors. One compelling avenue for integrating approximate computing involves the integration of a neural accelerator alongside the primary core, offering a delicate balance between computational efficiency and precision. A Neural Processing Unit (NPU) emulates regions of approximate code using neural networks. In this article, we introduce ANPiler- an innovative framework that augments the existing neural processing unit with a reconfigurable layer of approximation, achieved through the integration of inexact arithmetic building blocks. ANPiler empowers the design of neural accelerators featuring imprecise adders or multipliers, resulting in reductions of about S.55% in power consumption and approximately 13.09% in area compared to a precise neural processing unit coupled with a main core. These gains are achieved with almost the same accuracy as before, further underpinning energy savings of 3.0x compared to general-purpose processors, thereby reinforcing the value proposition of an exact NPU in practical applications.