DC-20 GHz Ultrawideband High Linearity Phased Array Switch

This letter presents a dc-20 GHz ultrawideband high linearity single-pole, double-throw (SPDT) switch with symmetrical construction in a 180 nm CMOS process for Phased array applications. In order to achieve high power processing capability in both transmit and receive modes, we innovatively proposed an ultrawideband SPDT switch that combines negative bias technology and stacked transistor technology. The test results show that in both Tx/Rx modes, the proposed SPDT switch has an insertion loss of less than 2.5 dB and an isolation of better than 19 dB in the dc-20 GHz frequency range. At 10 GHz, the input 1 dB compression point test results are 30.3 and 28.8 dBm in Tx and Rx modes, respectively. The chip core size of the proposed SPDT switch is 0.295 mm².