Design, Analysis and Verification of AMBA AXI4.0

AMBA AXI was developed by ARM in 2003 upgrading it to AMBA AXI 4.0 in 2014. AMBA AXI4.0 is a fast, efficient, high frequency, high performance, high bandwidth SOC (system-on-chip) protocol that is used for communication between CPU (central processing unit) and FPGA (field programmable gate arrays). It has five communication channels for reading and writing between master and slave. It supports burst transactions and has handshake mechanism, which makes it suitable for high data transfers rate and for pipeline processing of instructions. It finds applications in various ARM (advanced RISC (reduced instruction set computer) machine) based FPGAs like Zynq-7000, Zynq Ultrascale+, Spartan 7, Arria 10 etc. This work implements the AXI4.0 protocol for communication between master and slave for 32 bits of data transfer and verification of using protocol checker.