A Novel Dual-Mode Dual Trench MOSFET With Self-Adjustable Field Plate for Low EMI Noise and High Dynamic Avalanche Robustness

A novel dual-mode dual trench MOSFET (DDT-MOSFET) featuring shorted P-doping field plate (PFP) and N-doping field plate (NFP) is proposed. A parasitic depletion region capacitor and a parasitic MOSFET are introduced in the self-adjustable field plate (SFP). During turn-on, the DDT-MOSFET is in the split gate trench (SGT) mode with an electron inversion layer in the PFP, achieving low $C_{\mathrm { gd}}$ . During turn-off, the DDT-MOSFET is in the insulator pillar superjunction (I-SJ) mode with depleted PFP, achieving low electromagnetic interference (EMI) noise and high breakdown voltage (BV). Mode conversion is realized by the introduction of the SFP. By TCAD simulation, during turn-off, the proposed structure exhibits 33.9% improvement in BV, 42.8% reduction in maximum $dI_{\mathrm { D}}$ /dt and 44.1% reduction in overshoot voltage $(V_{\mathrm { O}})$ with same $E_{\mathrm { off}}$ , reducing EMI noise and improving dynamic avalanche robustness without deterioration of other electrical characteristics.