Hardware-Accelerated 1-Bit Quantization Using PyRTL for Efficient Neural Network Design

XNOR-Nets, an innovative binary convolutional neural network, is a promising solution to significantly reduce model size and computational complexity while maintaining a high level of accuracy. Despite these advantages, the full potential of XNOR-Nets remains to be explored, especially in terms of hardware acceleration. PyRTL is an embedded hardware design language that describes the architecture of digital hardware, which, combined with Python's versatility in programming, makes PyRTL an ideal candidate for rapid prototyping and customization of XNOR-Net accelerated hardware design tools. This study strives to bridge the gap between the theoretical efficiency of XNOR-Net and its practical applications by exploring the use of PyRTL to design specialized hardware accelerator.