Domain-Specific Hyperdimensional RISC-V Processor for Edge-AI Training

Edge AI has become the cornerstone of many applications. Yet, progress is limited by the large complexity of training dnn. hdc is positioned as an alternative approach for Edge AI that is compact enough to enable training. The main challenge for hdc model is to maintain its key features while balancing high inference accuracy with efficiency. A simple binary () model lacks accuracy, while the computational complexity of a floating-point model is too high. This work presents FixedHD, a novel 16-bit fixed-point model enabling training at the Edge. FixedHD achieves an accuracy similar to floating-point model while lowering computational complexity. The model is supported by a customized RISC-V processor tailored to speedup both training and inference. The processor is extended with advanced -specific instructions, a vector unit to utilize ’s parallel nature, and, for the first time, approximate computing to exploit its robustness. Further, memory requirements are reduced by quantizing mathematical functions and reducing the large encoding matrix by up to 390. Compared to the baseline processor, inference and training are accelerated on average by 6.9and 3, respectively. The energy consumption is reduced by 4.6and 1.9at the cost of an increase in area by 45%. The inference accuracy remains at the high level of floating-point models despite the heavy quantization and approximation.