An Efficient Reconfigurable Parameterized Convolutional Neural Network Accelerator on FPGA Platform

This paper presents an efficient reconfigurable parameterized convolutional neural network (CNN) accelerator designed for FPGA platforms. The core of the accelerator allows flexible adjustments of input channel parallelism (Pc) and convolution filter parallelism (Pn) to meet the needs of various CNN models, optimizing both resource utilization and computational efficiency. The architecture is applied specifically to infrared (IR) and visible light (VI) image fusion, enabling real-time processing on an FPGA with significantly reduced latency. Experimental results demonstrate that the accelerator reduces latency to 192 ms while maintaining high image quality, achieving efficient image fusion on the FPGA platform.