Testing Method for Embedded UltraRAM in Field Programmable Gate Arrays

Most testing methods for Field Programmable Gate Array (FPGA) on-chip memory are designed for Block RAM, which cannot detect all possible faults in UltraRAM due to its different structures and functions. To efficiently test all potential faults of UltraRAM, a test method with high fault coverage and reduced testing time needs to be designed. In this paper, a complete fault model for UltraRAM testing is established. Existing and new algorithms for testing this UltraRAM fault model are selected or proposed. The algorithms that have been modified or newly designed are tested by fault simulation, and 100% of the sampling faults are detected. The March MSS with DBS can be simplified to reduce the complexity by O(19N), and the complexity of the Byte-wide write enable testing algorithm can be reduced by O(N) when testing port A. By merging configurations to reduce the number of testing configurations, only nine configurations are required to test all the UltraRAMs in the Advanced Micro Devices Versal XCVE2302 device.