9.4 A 102ns/V 94.3%-Peak-Efficiency Symbol-Power-Tracking Supply Modulator for 5G NR Power Amplifiers

As 5G communication technology advances, the power consumption of radio frequency power amplifiers (RFPAs) in 5G systems has become increasingly critical. To enhance efficiency, Symbol Power Tracking (SPT) has emerged as a key technique, allowing dynamic adjustment of the RFPA supply voltage to match the instantaneous power demands of each symbol. SPT must achieve these voltage transitions within the brief duration of the cyclic prefix (CP), as short as $1.17\mu \mathrm{s}$ in frequency range 1 (FR1: 410MHz ~7125MHz), posing significant design challenges. Hybrid buck-boost converters without a right half-plane (RHP) zero are introduced in [1], [2] to improve tracking speed. However, their MHz-range switching frequency, needed for high efficiency, requires large output capacitors $(\mathrm{C}_{\mathrm{L}}]$ and inductors, limiting tracking speed to the order of microseconds per volt $(\mu \mathrm{S}/\mathrm{V})$. Auxiliary LDOs are often added in parallel to accelerate CL charging [3], but this significantly degrades dynamic efficiency during tracking. In [4], a split-capacitor approach is employed, dividing $\mathrm{C}_{\mathrm{L}}$ into a large capacitor (4.7µF) and a smaller one (470nF). The large capacitor is floated during tracking to allow rapid charging of the smaller one, followed by slow charging of the large capacitor via an LDO. This method still degrades dynamic efficiency and limits the minimum symbol duration to 30µs. A complex SPT structure involving capacitor swapping and pre-charging is proposed in [5]. The current draw from the LDOs is reduced as it only needs to charge a 220nF capacitor, with the main 4.7µF pre-charged by the switching converter. However, the symbol duration remains limited, and this structure requires numerous off-chip components.