5.7 A 4.7GHz, 27.7dBm $\mathbf{P}_{\text{out}}$, 37.8% PAE, $\mathbf{5.8}^{\circ}$ AM-PM Distortion Polar SCPA Using In-Cell Fast Slope-to-Phase Self-Calibration and Asymmetrical 4-to-1 Differential Power-Combining Transformer

With rapid advancements of wireless communication systems (e.g., sub-6G and WiFi), power amplifiers are required to deliver high data-rates with high output power, high efficiency, and compact size. Comparing with analog power amplifiers, digital power amplifiers (DPAs) are widely investigated for their high efficiency and high-integration level. Some challenges still exist in previous works [1]–[8]. A conventional DPA (Fig. 5.7.1) usually requires an extra digital pre-distortion (DPD) module with improved linearity to support complex modulation signals, which leads to increased circuit area and power consumption [1]–[3]. Then, voltage-mode switched-capacitor power amplifiers (SCPAs) were recently developed to exhibit high linearity [4]–[8]. Based on the SCPA mechanism, the transistor switching speed affects the delay and shapes of the switching waveforms of different amplitude codes [9], which deteriorates the AM-PM linearity at high frequencies. In this work, to improve AM-PM linearity of an SCPA operating at high frequencies and to support modulation signals without a DPD, the in-cell fast slope-to-phase self-calibration technique is proposed. Edge detectors and a slope-to-phase tuner are introduced in each unit cell to detect and tune the rising and falling edges, respectively. Then, the AM-PM linearity is improved in real time. In Fig. 5.7.1 (middle left), the output signal $(\mathrm{V}_{\text{CAP}})$ after an inverter is $\mathrm{V}_{\text{distorted}}$, which is detected by the falling and rising edge detectors. Then, the two edge detectors generate two output control voltages at nodes $\text{ED}_{\mathrm{R}}$, and $\text{ED}_{\mathrm{F}}$, respectively. The effective voltage $\mathrm{V}_{\mathrm{F}}$ at the node $\text{ED}_{\mathrm{R}}$ and voltage $\mathrm{V}_{\mathrm{R}}$, at the node $\text{ED}_{\mathrm{F}}$ change with the edge delay $\theta_{\mathrm{d}}$ between $\mathrm{V}_{\text{distorted}}$ and $\mathrm{V}_{\text{Ref}}$, as shown in Fig. 5.7.1 (middle middle). The $\mathrm{V}_{\mathrm{F}}$, and $\mathrm{V}_{\mathrm{R}}$ alternatively adjust discharging and charging time of slopes for signal $\mathrm{V}_{\text{edge}}$ through the slope-to-phase tuner, respectively. After a buffer, the signal $\mathrm{V}_{\text{edge}}$ is converted to an updated signal $\mathrm{V}_{\text{Ref}}$ with phase compensation of - $\theta_{\mathrm{d}}$ (Fig. 5.7.1 (rniddle-right). Therefore, the AM-PM distortion is calibrated, which leads to a constant output phase of $\mathrm{V}_{\text{CAP}}$. Simplified circuits, including the edge detectors and the slope-to-phase tuner, are used in the self-calibrated SCPA cell design, which shows reduced parasitics and fast response time. Moreover, the in-cell calibration exhibits a short calibration-loop path. Therefore, the proposed in-cell fast slope-to-phase self-calibration technique features a low loop delay and contributes to support fast baseband for wide-modulation-bandwidth signals of wireless communication systems.