27.2 A Voltage-Biased CMOS Hall Sensor with $1.0\mu \mathrm{T}(3\sigma)$ Offset and a $60\text{nT}/ \sqrt{\text{Hz}}$ Noise-Floor

Hall sensors are the only CMOS devices capable of measuring DC magnetic fields and so they are used in a wide range of applications, such as in compasses and current sensors. In such applications, their Achilles heel is their offset, which is typically in the order of several (tens of) $\mu\mathrm{T}$ [1]–[3]. Conventionally, Hall sensors are biased by current sources and output voltages that are proportional to an external magnetic field. In this work, a dual arrangement is proposed, in which a Hall sensor is biased by a voltage source and outputs a current. In a standard $0.18\mu\mathrm{m}$ CMOS process, a prototype Hall sensor with a low-offset readout circuit achieves an offset of $1.0\mu\mathrm{T}(3\sigma)$ with a noise floor of $60\text{nT}/\sqrt{\text{Hz}}$. Compared to the state-of-the-art [1], this represents a 3x reduction in offset and a 5x improvement in resolution.