Reconfigurable and Green FPGA Accelerator Design for Deep Neural Networks on IIoT Devices

We propose an extremely energy efficient and reconfigurable accelerator for performing Deep Neural Network (DNN) inferences on a Field-Programmable Gate Array (FPGA). Our design allows on the fly reconfigurability of the model to adapt it to any arbitrary DNN inference task and perform it with an extremely low latency, on the scale of tens of micro seconds. Our design can be adopted by resource constrained Industrial Internet of Things (IIoT) devices (e.g., mobile robots) to fulfill different DNN inference tasks. By parallelization of the matrix multiplications in each layer of the DNN and adopting an adjustable sliding window at the synthesize stage, our accelerator strikes a balance between the computing latency and the scarce resource utilization on the FPGA. It also uses a low-overhead control scheme for the accelerator’s internal interactions to update the DNN model on-the-fly. The results show that for a DNN model with 64 input features, 9 hidden layers (each with 64 neurons), and 64 output variables, our proposed inference accelerator speeds up the inference by 28.8 times and decreases the energy consumption by 31 % compared to an AMD Deep Learning Processing Unit.