Hybrid CPU-FPGA Accelerated Architecture for Hurst Surface Feature Extraction and SVM Classification of ECG Signals

In this paper, a hybrid CPU-FPGA architecture is proposed to accelerate the extraction of contour-based features from ECG-derived Hurst surface images, coupled with an FPGA-accelerated Support Vector Machine (SVM) for arrhythmia detection. Traditional CPU-based systems, while efficient for large-scale data processing, face challenges in real-time applications due to their sequential nature, which can lead to delays. To address these limitations, a custom FPGA kernel was developed to leverage hardware-level parallelism for faster processing. The CPU is responsible for extracting global features, such as entropy, skewness, and kurtosis, and managing data flow and higher-level statistical analyses. In parallel, the FPGA efficiently handles computationally intensive tasks, including contour detection and the extraction of geometric features such as area and perimeter, as well as texture features like Hu moments and Haralick texture descriptors. This division of labor allows the system to optimize resource utilization, with the CPU handling sequential, control-oriented tasks and the FPGA accelerating pixel-based operations. The features extracted by the hybrid CPU-FPGA system are then processed by the FPGA-accelerated SVM classifier, enabling real-time arrhythmia detection. This architecture not only reduces computational latency and enhances processing speed but also maintains high classification accuracy, making it suitable for large-scale, time-sensitive medical diagnostics. The results validate its effectiveness for real-time ECG analysis, presenting a scalable and efficient framework for advancing medical diagnostics and other biomedical signal processing applications.