Cycle Slipping in a First-Order Phase-Locked Loop

In this paper a model for a carrier plus narrowband noise is presented, and with its aid the expected number of cycle slipping events per second for a first-order phase-locked loop (PLL) driven by a narrowband noise corrupted carrier, both with and without a limiter, is determined. Experimental data are presented which indicate the extreme accuracy of the results obtained with the use of this model. The noise model, which is based on the hypothesis that steps of
\pm2\pi
in phase exist when a carrier is added to narrowband noise, yields not only computational simplicity in calculating the expected number of cycle slipping events per second in a PLL, but also a good deal of insight into the basic threshold improvement mechanism of the PLL. In particular it is shown that a cycle slipping event, or equivalently a PLL output "click" occurs not when the PLL "loses lock," but rather when it tracks a step of
\pm2\pi
appearing at its input.