Advancing VLSI Routing Algorithms through Machine Learning Techniques

Routing is a fundamental step in the design of very large-scale integration (VLSI) circuits, which influences the efficiency, performance, and reliability of modern electronic devices. Although highly efficient, these traditional routing algorithms struggle to overcome the increasing complexity and scale of today's VLSI designs. The era of machine learning (ML) has led to the redesign of traditional planning solutions based on data-driven insights and adaptive decision-making. This article explores different ML paradigms used to optimize router performance in terms of efficiency and scalability. This review article also discusses the bottlenecks in research and current trends in ML integration, as well as the challenges and opportunities for future developments on VLSI routing. This article highlights the scalability, reliability, and support for integrating ML mechanisms within existing electronic design automation (EDA) flows. This article aims to summarize these recent approaches toward developing state-of-the-art methodologies, listing the methods used and how they utilize such model-generated insights, thereby shedding light on the revolutionary capacity of ML in optimizing VLSI routing algorithms.