Design and Analysis of a Pseudo-Random Number Generator with Dynamic Seed Reset using 8-bit,16-bit and 32-bit Polynomials

The development and evaluation of a pseudo-random number generator (PRNG) using 8-bit, 16-bit, and 32-bit polynomials to measure intervals before reconstructing random sequences. To deal with this, a dynamic soft reset mechanism is integrated, which automatically updates the results as it detects repeated patterns, so it automatically searches for unexpected sequences with PRNG examples that were implemented and tested on different FPGA platforms, and evaluates key metrics-such as iteration interval, power efficiency, and resource allocation-for each polynomial The generated results show that the proposed method stops sequence iteration well, especially 32-bit polynomials and this work enhances FPGA-based PRNG design while optimizing resource utilization, providing an effective solution for systems requiring high randomness and security.