A 1024-Input Multi-Stage Voltage-Mode WTA Circuit for Selective Attention Based Processing in Massive Parallel Sensing Applications

This work presents a high-speed high-resolution 1024-input voltage-mode WTA circuit which is suitable for selective attention based processing systems. The circuit uses multi-stage WTAs to improve the resolution and speed. The WTA blocks use a max selector circuit to ensure error-free comparisons in their succeeding stages. The outputs of the max selector circuits are buffered to reduce the delay due to the cascaded transmission gates. The 1024-input WTA circuit designed in UMC 180 nm CMOS process experiences a worst-case delay of 235 ns for an input resolution of 8 mV.