C4ECC: Data Compression for Bandwidth Efficiency Under ECC Protection in GPUs

Modern GPUs using Graphics DDR DRAM rely on in-band Error Correcting Code (ECC) for memory protection, but this reduces effective bandwidth and increases latency. This paper introduces Data Compression for Bandwidth Efficiency under ECC Protection in GPUs, called C4ECC. C4ECC compresses 32B blocks to fit both data and redundancy within a single transfer between the GPU's Last Level Cache and device memory. Our evaluation shows that while traditional in-band ECC increases memory traffic by 68%, C4ECC reduces this overhead to an average of just 1.4 %. This reduction significantly lowers the performance overhead caused by in-band ECC from 34% to 3%, particularly in memory-intensive workloads.