Real time inferencing of semiconductor wafer probing process using Machine Learning

The Wafer Sort process in Semiconductor Manufacturing identifies die defects before assembly into packages. A wafer prober verifies each die on a wafer by making precise electrical-mechanical connections between thousands of die bumps with probe tips finer than a human hair. Poor contact could damage these bumps or even break underlying circuitry causing yield losses or reliability defects. Previous state-of-the-art utilized statistical process control systems based on historical electrical failure baselines to identify degraded probers. Flagged probers require costly repair procedures that consume man-hours and metrology tools to verify probe length, planarity, and conductivity.Accuracy of the past method reduced significantly for smaller device dimensions of advanced process nodes that are increasingly susceptible to fab variations. A stable historical baseline took long to establish and often could not be conclusively determined, resulting in thousands of repair hours and millions in capital costs spent annually debugging invalid alarms. Our work rearchitected the past method with a machine learning based defect detection solution. By comprehending wafer spatial locations of different electrical failures, we achieved real time inferencing of upstream fab defects versus genuine prober issues requiring repairs. This novel approach demonstrated consistently high defect classification accuracy in high volume manufacturing.