Polarization Enhanced GaN Complementary Logic Circuits with Short Propagation Delay

This work demonstrates a GaN complementary logic (CL) technology on an E-mode p-GaN gate HEMT platform, realizing several critical goals. (1) Adopting polarization enhanced acceptor ionization, the fabricated E-mode GaN p-FET with $L_{\mathrm{G}}=2\mu \mathrm{m}$ exhibits a high $I_{\max}$ of 23 mA/mm, a high $I_{\mathrm{O}\mathrm{N}}/I_{\mathrm{O}\mathrm{F}\mathrm{F}}$ of $6.5\times 10^{7}$, a low SS of 89 mV/dec and negligible $\nabla_{\mathrm{t}\mathrm{h}}$ hysteresis. (2) The thin AlN polarization layer exhibits negligible influence on the performance of E-mode n-FET, which enables the integration of E-mode n/p-FETs for GaN CL circuits. (3) The elementary logic gate circuits are demonstrated, including GaN CL inverter, transmission, NAND, NOR gate, and RS latch. The GaN CL inverter achieves a large voltage gain of 118.9 V/V. The monolithic integration of GaN power HEMT with GaN CL buffers are also presented. (4) The GaN ring oscillators (ROs) exhibit a breakthrough in propagation delay $\tau_{\mathrm{p}\mathrm{d}}$, which is as short as $\sim 13$ ns comparing to $> 30$ ns in prior publications. These results demonstrate the potential of GaN complementary logic for MHz-level GaN power integrated circuits (PICs) and harsh-environment electronics.