A Novel Channel-Less SOT-MRAM with 115% TMR, 2 ns Switching, and High Bit Yield (>99.9%)

We demonstrate for the first time spin-orbit-torque (SOT) magnetic tunnel junction (MTJ) devices without an SOT channel (channel-less). The MTJ pillar is placed directly on two appropriately separated bottom electrodes (BE). The SOT layer is self-aligned to the MTJ pillar, no extra definition of the SOT channel is needed during integration. The channel-less devices show electrical switching down to 2 ns, a write-error-rate below 10⁻⁶, endurance greater than 10¹², and a 16.5% (39.2%) critical switching current (write power) reduction compared to typical SOT MTJ devices. Remarkably, the process window of MTJ pillar etch has been widened, and hence a sub-200 ppm bit-error-rate (BER) due to hard fail is obtained. We conclude that the channel-less SOT-MTJ with high performance, low BER, and good scalability shows great suitability for the development of SOT-MRAM chips.