ISO-Performance N-Type and P-Type MOSFETs on Densely Aligned CNT Array Enabled by Self-Aligned Extension Doping with Barrier Booster

Carbon nanotubes (CNTs) show great promise as channel material for future highly scaled transistors due to their atomic-thin body, high carrier mobility, and high injection velocity for both electrons and holes. In this work, we achieve ID greater than $300\mu \mathrm{A}/\mu \mathrm{m}$ at +/-1V VDS (iso-performance) for both N-type and P-type MOSFETs with 100nm gate length (LG) on densely aligned CNT array by self-aligned extension doping with a barrier booster [1]. Our process only modifies the extension dopant and contact metal to alter the device polarity while maintaining iso-performance. We also present the first experimental validation of tunable doping strength, mobility loss minimization, and leakage reduction capabilities of the barrier booster method, studied for top-gate CNT N-type MOSFET in this paper. Using this method, we achieve the best performance to date for N-type MOSFET on densely aligned CNT array, with $\mathrm{I}_{\mathrm{D}} > 200\mu \mathrm{A}/\mu \mathrm{m}$ and $\mathrm{I}_{\max}/\mathrm{I}_{\min}$ exceeding 10⁴ simultaneously at 1V VDS and 500nm LG. With future improvements to the dielectric interface quality and device scaling, the benefits of CNT CMOS technology may be fully realized.