Vertically Integrated Active Power Delivery Network (PDN) for Heterogenous 3D (H3D) Stacked Systems: 3D On-Chip Integration of GaN Power Devices on PDN with Direct Heat Spreading Layer Bonding

Efficient power delivery network (PDN) and thermal dissipation are the main challenges in H3D stacked systems for high-performance computing (HPC) and artificial intelligence/machine learning (AI/ML) applications. In this work, we demonstrate heterogeneous 3D integration of GaN power devices (E-mode and D-mode GaN HEMTs) on PDN of CMOS chip with direct heat spreading layer bonding for vertically integrated active PDN. As a result, our GaN power device with $L_{\mathrm{G}}$ of $1.5\ \mu \mathrm{m}$ and $L_{\text{GD}}$ of $15\ \mu\mathrm{m}$ provides $R_{\text{on}}$ of $22.3\ \Omega\cdot \text{mm}$ and $V_{\text{BD}}$ of 137 V, which pushes Si limits as power devices. Furthermore, for the first time by using a thermoreflectance microscopy (TRM) system, we experimentally demonstrated that the thermal effects of H3D integrated GaN power devices on CMOS can be significantly relaxed by direct heat spreading layer bonding. The GaN power devices with a direct heat spreading layer show 48.8% improved thermal resistance $(R_{\text{TH}})$ compared to conventional GaN power devices. These results represent a significant milestone in advancing PDN, paving the way for vertically integrated active PDN, which enables efficient power delivery and thermal management for H3D stacked systems.