High Speed Approximate Adder for Error Tolerant Image Processing Applications

Approximate computing has emerged as a popular approach for improving the performance of the circuit and the system. It is particularly useful in applications where operations can tolerate errors, such as in scientific computing, signal processing, machine learning and multimedia processing. MGDI (Modified Gate Diffusion Input) is an enhanced version of GDI (Gate Diffusion Input) that offers full-logic functionality. In this study, a new 1-bit approximate MGDI-based full swing adder, known as Delay Efficient 1-bit MGDI (DEAFA) adder is proposed to minimize the error distance. This adder is extended to a 16-bit approximate adder, which is segmented into accurate and inaccurate adder circuits. The design is implemented on 90nm technology node using Cadence Virtuoso, with key design metrics of area, delay, and power consumption, used for performance evaluation.