SANA-FE: Simulating Advanced Neuromorphic Architectures for Fast Exploration

Neuromorphic computing is concerned with designing computer architectures inspired by the brain, with recent work focusing on platforms to efficiently execute large spiking neural networks (SNNs). Future designs are expected to improve their capabilities and performance by incorporating novel features, such as emerging neuromorphic devices and analog computation. There is, however, a lack of high-level performance estimation tools to evaluate the impact of such features at the architectural level, to evaluate architectural tradeoffs, and to aid with co-design and design-space exploration. Existing neuromorphic simulators either do not consider hardware performance, only model abstract SNN dynamics or are targeted to a single specific architecture. In this work, we propose SANA-FE, a novel simulator that can rapidly and accurately estimate performance and energy efficiency of different SNN-based designs. Our simulator uses a general and configurable architecture description format that can specify a wide range of neuromorphic designs. Using such an architecture description, SANA-FE simulates system activity when executing a given spiking application at an abstract time-step granularity, and it uses activity counts and per-activity performance metrics to estimate energy and latency for each time-step. We further show a calibration methodology and apply it to model performance of Intel’s Loihi platform. Results demonstrate that our simulator can predict Loihi’s energy and latency for three real-world applications, within 12% and 25%, respectively. We further model IBM’s TrueNorth architecture, simulating a random network over $20\times $ faster than existing discrete-event-based TrueNorth simulators. Finally, we demonstrate SANA-FE’s design-space exploration capabilities by optimizing a Loihi baseline architecture for two application, reducing run-time by 21% while increasing dynamic energy usage by only 2%.