An Area-Efficient Ising Machine based on Parallel Stochastic Cellular Automata Tempering

As a potential solver for combinatorial optimization problems (COPs), the convergence speed and accuracy of Ising machines still have room to be improved at the level of algorithm and architecture design. In this paper, a novel parallel stochastic cellular automata tempering (PSCAT) algorithm is proposed to enhance the performance of fully-connected Ising machines. Additionally, a modified temperature exchange probability is applied to reduce the number of replicas in the hardware implementation. The utilization of the spin update module is improved by reducing the flip decision block. The design prototype with 2,048 spins and 8 replicas is validated on FPGA. Using the K2000 max-cut problem as a benchmark, our design achieves a solution accuracy of $\mathbf{9 8. 9 4 \%}$ within 0.5 ms, which is higher than two state-of-the-art works.