A 0.9-V Supply Up to 21.5-dB Boost Gain Analog Front-End with T-coilloaded CTLE and VGA in 28-nm CMOS for 112-Gb/s PAM-4 Medium-Reach Receivers

This paper presents an analog front-end (AFE) circuit for 112-Gb/s four-level pulse amplitude modulation (PAM-4) medium-reach (MR) receivers. To ensure sufficient bandwidth and enhance boost gain, the AFE employs of a cascaded architecture of two stages of continuous-time linear equalizer (CTLE) and three stages of variable gain amplifier (VGA). Both the CTLE and VGA are loaded with T-coils to extend the bandwidth, enabling the AFE to operate at a standard voltage of 0.9 V without a dedicated regulator. Eight parameters are adopted to tune the high, medium, and low-frequency-bands response to match loss profiles well for MR channels. Post-layout simulations in 28-nm CMOS technology demonstrate that the proposed AFE achieves a gain boost of up to 21.5 dB dissipating 43.8 mW at a 0.9V supply, achieving larger than $28-\mathrm{GHz}$ bandwidth within the area of $0.06 \mathrm{~mm}^{2}$. When combined with an ideal 4-tap feed-forward equalizer (FFE) from the transmitter, the proposed AFE achieves a symbol error rate $(S E R)\lt 10^{-12}$ at $112 \mathrm{~Gb} / \mathrm{s}$ using $2^{15}-1$ PRBS PAM-4 pattern with a $19.5-\mathrm{dB}$ channel loss at 28 GHz.